This invention relates generally to telecommunication transmission networks and in particular to a switch capable of handling synchronous transfer mode (STM) as well as asynchronous transfer mode (ATM) traffic.
In telephone networks, synchronous transfer mode switching establishes a circuit connection for the calling and the called party to exchange information for the complete duration of the connection. Each circuit has a fixed bandwidth. Several circuits can be multiplexed onto a link, and switching is performed by translating the incoming circuit address to the outgoing circuit address. Before the data can flow from the input circuit to the output circuit, a mapping of the incoming address to the outgoing address must be established. Once a connection is established, its bandwidth cannot be used by any other connection, whether there is any traffic flowing or not. For instance, once a voice connection is established, a bandwidth of 64 kilobits per second is allocated to each party, for the duration of the connection. When one of the parties is listening to the other party, the listening party does not generate any traffic. Although the bandwidth is not used during such silent periods, it cannot be used to transfer any other traffic.
Synchronous transfer mode network technology minimizes the end-to-end delay of the connection. There is no need for data buffers since output contention never occurs. However, it is not an efficient way to support variable bit rate traffic since each circuit has a fixed bandwidth. Asynchronous transfer mode (ATM) network technology is a more efficient form for transporting variable bit rate traffic. The increased demand for variable bit rate services has led to a network shared by both types of traffic.
Asynchronous transfer mode switching transports cells from an input port to an output port based on the information carried in the cell header and a switch routing table. An ATM connection is established by setting up the routing table such that an association is established between an output port and the connection identifiers carried in the cell. The connection identifiers are the virtual path identifier (VPI) and the virtual channel identifier (VCI).
Contention resolution and buffering of contending cells are basic functions of an ATM switch. In ATM connections, no attempt is made to find a time slot that is mutually convenient to the input port and the output port. Thus, output contention will occur among cells arriving simultaneously for the same destination, and buffering must be provided for the contending cells since discarding the cells is not acceptable.
Given the present use of telecommunication transmission networks on which constant bit rate traffic transported as STM and variable bit rate traffic carried as ATM are present in the network simultaneously, there is a need for a technique to accommodate both types of traffic in a single switching element that offers STM switching for the STM traffic and ATM switching for the ATM traffic.
Some switching arrangements for handling dual mode traffic have been proposed. For example, U.S. Pat. No. 5,390,184 discloses an ATM switch that includes an ATM scheduler for ATM service, an STM scheduler for STM service and a selection circuit for determining STM/ATM scheduling priority. STM traffic is given priority over ATM traffic.
U.S. Pat. No. 5,577,037 discloses a switching unit that is operable to switch STM signals (which have been packetized) and ATM signals. The available time slots in input and output highways are determined, and the STM signals are stored in a data memory at addresses that correspond with the previously secured time slots. When storing an STM signal in the data memory, the address in which the STM signal is to be stored is read out from the previously stored address information, and the STM signal is stored in the data memory at the corresponding address. The processing for ATM signals is performed in a similar fashion, with the unused portion of the memory being allocated for processing ATM signals.
U.S. Pat. No. 5,570,355 discloses a data transmission network for handling STM traffic and ATM traffic which includes a circuit for dynamically adjusting the location and size of STM/ATM memory region boundaries.
U.S. Pat. No. 5,144,619 discloses a common memory switch for routing ATM cells and STM words in which STM words are accumulated and are combined with a header to form a switch cell. The cells are queued along with the address for each switch cell and are stored in memory. Switch cells are then transmitted to an outgoing channel corresponding to an address indicative of the incoming channel from which the presented cell originates.